Hardware Documentation and Howto's

Getting Started

• VCU118
• PTB

Documentation

pRU

• pRU Control Interface
• pRU Address Map
• pRU Ethernet Configurations
• pRU Data Format

pRU Bus System

pRU Bus Tree

The pRU bus system is connecting the various modules on the FPGA to a common master, the Microblaze Subsystem. Each of the modules is associated with a given BASE-ADDRESS specified in the pRU Control Interface Document. Note that several instances do exist for certain modules. E.g. there are one alpide_data instance for each ALPIDE chip connected to the pRU. To communicate with a specific instance one needs to add an offset of 0x1000 times the instance number to the module base address.

E.g. if you want to communicate with the 1st instance of the alpide_data module:Template:Break <ALPIDE_DATA_BASEADDR>

2nd instance:{break} <ALPIDE_DATA_BASEADDR> + (0x1000 * 2-1)

16th instance:{break} <ALPIDE_DATA_BASEADDR> + (0x1000 * 16-1)