Hardware Documentation and Howto's: Difference between revisions

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=== Transition Card (TC) ===
=== Transition Card (TC) ===


*  [[Media:TC-v1.0_schematic.pdf | TC-v1.0_schematic]]
*  [[:Media:TC-v1.0_schematic.pdf | TC-v1.0_schematic]]  


=== ALPIDE Chip ===
=== ALPIDE Chip ===

Revision as of 10:27, 14 January 2020

Getting Started

Documentation

pRU

pRU Registers and Bus System

Top level firmware.pngBus tree.png

The pRU bus system is connecting the various modules on the FPGA to a common master, the Microblaze Subsystem. Each of the modules is associated with a given BASE-ADDRESS specified in the pRU Control Interface Document. Note that several instances do exist for certain modules. E.g. there are one alpide_data instance for each ALPIDE chip connected to the pRU. To communicate with a specific instance one needs to add an offset of 0x1000 times the instance number to the module base address.

E.g. if you want to communicate with the

  • 1st instance: <ALPIDE_DATA_BASEADDR>
  • 2nd instance: <ALPIDE_DATA_BASEADDR> + (0x1000 * (2-1))
  • 16th instance: <ALPIDE_DATA_BASEADDR> + (0x1000 * (16-1))
Module Registers

PTB-specific Module Registers

Transition Card (TC)

ALPIDE Chip

ALPIDE Bonding and Mounting

Chip Cable

9 Chip String

Production Test Box (PTB)

FPGA Mezzanine Card (FMC)

mTower